Sciweavers

127 search results - page 4 / 26
» Synthesis of Operation-Centric Hardware Descriptions
Sort
View
83
Voted
DSD
2009
IEEE
88views Hardware» more  DSD 2009»
14 years 7 months ago
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
VLSISP
2008
140views more  VLSISP 2008»
14 years 9 months ago
Regular Expression Matching in Reconfigurable Hardware
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
Ioannis Sourdis, João Bispo, João M....
ECOOP
2008
Springer
14 years 11 months ago
Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...
Shan Shan Huang, Amir Hormati, David F. Bacon, Rod...
FDL
2005
IEEE
15 years 3 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina
ICCAD
1994
IEEE
99views Hardware» more  ICCAD 1994»
15 years 1 months ago
Condition graphs for high-quality behavioral synthesis
Identifying mutual exclusiveness between operators during behavioral synthesis is important in order to reduce the required number of control steps or hardware resources. To impro...
Hsiao-Ping Juan, Viraphol Chaiyakul, Daniel D. Gaj...