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» Synthesis of Reversible Logic
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FPL
2004
Springer
80views Hardware» more  FPL 2004»
15 years 3 months ago
Secure Logic Synthesis
This paper describes the synthesis of dynamic differential logic to increase the resistance of FPGAs against Differential Power Analysis. Compared with an existing technique, it sa...
Kris Tiri, Ingrid Verbauwhede
SAT
2007
Springer
121views Hardware» more  SAT 2007»
15 years 3 months ago
Applying Logic Synthesis for Speeding Up SAT
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
Niklas Eén, Alan Mishchenko, Niklas Sö...
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Decomposition based approach for synthesis of multi-level threshold logic circuits
Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the ...
Tejaswi Gowda, Sarma B. K. Vrudhula
VLSID
2002
IEEE
135views VLSI» more  VLSID 2002»
15 years 10 months ago
An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
Rupesh S. Shelar, Sachin S. Sapatnekar
FPGA
2009
ACM
148views FPGA» more  FPGA 2009»
15 years 4 months ago
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
Stephen Jang, Dennis Wu, Mark Jarvin, Billy Chan, ...