61 search results - page 11 / 13 » Synthesis of Selectively Clocked Skewed Logic Circuits |
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
75
Voted
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
LCN
2003
IEEE
15 years 2 months ago
2003
IEEE
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...