10159 search results - page 570 / 2032 » System Design Validation Using Formal Models |
151
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
Errors in timing closure process during the physical design stage may result in systematic silicon failures, such as scan chain hold time violations, which prohibit the test of ma...
194
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KESAMSTA
2010
Springer
15 years 5 months ago
2010
Springer
A variety of business interactions in open environments can be captured in terms of creation and manipulation of social commitments among the agents. Such interactions include B2B ...
172
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AAMAS
2008
Springer
15 years 6 months ago
2008
Springer
The ability to create effective multi-agent organizations is key to the development of larger, more diverse multi-agent systems. In this article we present KB-ORG: a fully automate...
184
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LADC
2007
Springer
16 years 24 days ago
2007
Springer
Analysis and design patterns are well established as a convenient and reusable way to build high-quality object-oriented software. Patterns combine experience and good practices t...
145
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DAC
2010
ACM
15 years 10 months ago
2010
ACM
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...