Sciweavers

4887 search results - page 691 / 978
» System Level Design Using C
Sort
View
SOSP
1997
ACM
15 years 5 months ago
Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
Robert Stets, Sandhya Dwarkadas, Nikos Hardavellas...
SIGOPS
2008
119views more  SIGOPS 2008»
15 years 4 months ago
Project Kittyhawk: building a global-scale computer: Blue Gene/P as a generic computing platform
This paper describes Project Kittyhawk, an undertaking at IBM Research to explore the construction of a nextgeneration platform capable of hosting many simultaneous web-scale work...
Jonathan Appavoo, Volkmar Uhlig, Amos Waterland
IPPS
2007
IEEE
15 years 10 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
DAC
2007
ACM
16 years 5 months ago
Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs
Abstract. Embedded multimedia systems often run multiple time-constrained applications simultaneously. These systems use multiprocessor systems-on-chip of which it must be guarante...
Sander Stuijk, Twan Basten, Marc Geilen, Henk Corp...
NOSSDAV
2009
Springer
15 years 11 months ago
SLIPstream: scalable low-latency interactive perception on streaming data
A critical problem in implementing interactive perception applications is the considerable computational cost of current computer vision and machine learning algorithms, which typ...
Padmanabhan Pillai, Lily B. Mummert, Steven W. Sch...