4887 search results - page 752 / 978 » System Level Design Using C |
135
click to vote
DSD
2004
IEEE
15 years 7 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
138
click to vote
DAC
2008
ACM
16 years 4 months ago
2008
ACM
In this paper, a novel automatic approach for the concurrent topology and routing optimization that achieves a high quality network layout is proposed. This optimization is based ...
109
Voted
ICASSP
2009
IEEE
15 years 10 months ago
2009
IEEE
We propose a new image device called gigavision camera. The main differences between a conventional and a gigavision camera are that the pixels of the gigavision camera are binary...
MHCI
2009
Springer
15 years 10 months ago
2009
Springer
The aim of this study was to examine how users perceive help on a mobile device with respect to the presentation format and the severity of the scenario the user encounters. We ex...
135
click to vote
AINA
2007
IEEE
15 years 10 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...