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EUROPAR
2004
Springer
16 years 2 days ago
Improving Data Cache Performance via Address Correlation: An Upper Bound Study
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
Peng-fei Chuang, Resit Sendag, David J. Lilja
SAMOS
2004
Springer
16 years 1 days ago
with Wide Functional Units
— Architectural resources and program recurrences are the main limitations to the amount of Instruction-Level Parallelism (ILP) exploitable from loops, the most time-consuming pa...
Miquel Pericàs, Eduard Ayguadé, Javi...
VISUALIZATION
2002
IEEE
15 years 11 months ago
Face-based Luminance Matching for Perceptual Colormap Generation
Most systems used for creating and displaying colormap-based visualizations are not photometrically calibrated. That is, the relationship between RGB input levels and perceived lu...
Gordon L. Kindlmann, Erik Reinhard, Sarah Creem
EUROPAR
2009
Springer
15 years 11 months ago
Capturing and Visualizing Event Flow Graphs of MPI Applications
A high-level understanding of how an application executes and which performance characteristics it exhibits is essential in many areas of high performance computing, such as applic...
Karl Fürlinger, David Skinner
DFT
2006
IEEE
148views VLSI» more  DFT 2006»
15 years 8 months ago
Bilateral Testing of Nano-scale Fault-tolerant Circuits
As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. ...
Lei Fang, Michael S. Hsiao
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