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» System-Level Design for FPGAs
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CAISE
2010
Springer
15 years 5 months ago
Design and Verification of Instantiable Compliance Rule Graphs in Process-Aware Information Systems
For enterprises it has become crucial to check compliance of their business processes with certain rules such as medical guidelines or financial regulations. When automating compli...
Linh Thao Ly, Stefanie Rinderle-Ma, Peter Dadam
FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
15 years 10 months ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
129
Voted
FCCM
2005
IEEE
107views VLSI» more  FCCM 2005»
15 years 10 months ago
Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller
As technology sizes decrease and die area increases, designers are creating increasingly complex computing systems using FPGAs. To reduce design time for new products, the reuse o...
Lesley Shannon, Paul Chow
130
Voted
FPGA
2009
ACM
148views FPGA» more  FPGA 2009»
15 years 11 months ago
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
Stephen Jang, Dennis Wu, Mark Jarvin, Billy Chan, ...
HOST
2009
IEEE
15 years 11 months ago
Secure IP-Block Distribution for Hardware Devices
—EDA vendors have proposed a standard for the sharing of IP among vendors to be used in the design and development of IP for FPGAs. Although, we do not propose any attacks, we sh...
Jorge Guajardo, Tim Güneysu, Sandeep S. Kumar...