897 search results - page 132 / 180 » System-Level Design for FPGAs |
121
Voted
SLIP
2009
ACM
15 years 11 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
157
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ASAP
2008
IEEE
15 years 11 months ago
2008
IEEE
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
150
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RECONFIG
2008
IEEE
15 years 11 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
150
Voted
FCCM
2005
IEEE
15 years 10 months ago
2005
IEEE
When designing systems-on-a-chip (SoCs), a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be ...
141
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FPGA
2005
ACM
15 years 10 months ago
2005
ACM
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...