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95
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FPGA
2009
ACM
151views FPGA» more  FPGA 2009»
15 years 7 months ago
Wirelength modeling for homogeneous and heterogeneous FPGA architectural development
This paper describes an analytical model that relates the architectural parameters of an FPGA to the average prerouting wirelength of an FPGA implementation. Both homogeneous and ...
Alastair M. Smith, Steven J. E. Wilton, Joydip Das
123
Voted
DAC
2004
ACM
15 years 4 months ago
An SoC design methodology using FPGAs and embedded microprocessors
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
Nobuyuki Ohba, Kohji Takano
115
Voted
FPL
1995
Springer
152views Hardware» more  FPL 1995»
15 years 4 months ago
Compiling Ruby into FPGAs
This paper presents an overview of a prototype hardware compiler which compiles a design expressed in the Ruby language into FPGAs. The features of two important modules, the re ne...
Shaori Guo, Wayne Luk
95
Voted
DICTA
2007
15 years 2 months ago
Optimizing Resources of an FPGA-based Smart Camera Architecture
The acceptance of reconfigurable platforms specifically FPGAs in embedded system design is becoming more apparent. While there are varieties of platforms available for smart cam...
Amelia W. Azman, Abbas Bigdeli, Yasir Mohd-Mustafa...
90
Voted
DFT
2007
IEEE
123views VLSI» more  DFT 2007»
15 years 7 months ago
Checker Design for On-line Testing of Xilinx FPGA Communication Protocols
In the paper, a methodology of developing checkers for communication protocol testing is presented. It was used to develop checker to test IP cores communication protocol implemen...
Martin Straka, Jiri Tobola, Zdenek Kotásek