897 search results - page 36 / 180 » System-Level Design for FPGAs |
FPGA
1995
ACM
15 years 4 months ago
1995
ACM
Area-IO provide a way to eliminate the IO bottleneck of eld programmable logic devices (FPLDs) created the mismatch between the ability of perimeter bonds to provide IO and and t...
VTS
2005
IEEE
15 years 6 months ago
2005
IEEE
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs, since SEUs in configuration bits of FPGAs result in permanent errors in the mapped...
160
Voted
FPGA
2004
ACM
15 years 4 months ago
2004
ACM
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
DAC
2002
ACM
16 years 1 months ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...