1258 search results - page 89 / 252 » Table design in dynamic programming |
104
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PC
1998
14 years 11 months ago
1998
BSPlib is a small communications library for bulk synchronous parallel (BSP) programming which consists of only 20 basic operations. This paper presents the full de nition of BSPl...
78
Voted
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
ISCA
2003
IEEE
15 years 5 months ago
2003
IEEE
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...
101
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ISCA
2002
IEEE
15 years 4 months ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
CISIS
2010
IEEE
15 years 6 months ago
2010
IEEE
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...