48 search results - page 5 / 10 » Tail-robust scheduling via limited processor sharing |
CDC
2009
IEEE
15 years 2 months ago
2009
IEEE
— We study a clock calibration problem for an ultra-low power timer on a sensor node platform. When the sensor is put into sleep mode, this timer is the only thing left running, ...
111
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VEE
2010
ACM
15 years 4 months ago
2010
ACM
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
81
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AUTOMATICA
2006
14 years 9 months ago
2006
Resource allocation involves deciding how to divide a resource of limited availability among multiple demands in a way that optimizes current objectives. In this brief paper we fo...
100
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RTAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
120
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TVLSI
2010
14 years 4 months ago
2010
With the shrinking of technology feature sizes, the share of leakage in total power consumption of digital systems continues to grow. Traditional dynamic voltage scaling (DVS) fail...