Sciweavers

2956 search results - page 82 / 592
» Targeted Data Prefetching
Sort
View
IPPS
1998
IEEE
15 years 4 months ago
Memory Hierarchy Management for Iterative Graph Structures
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
Ibraheem Al-Furaih, Sanjay Ranka
ENC
2004
IEEE
15 years 3 months ago
Virtual Campeche: A Web Based Virtual Three-Dimensional Tour
We present a web-based application that allows a user to, walk through, see, and interact with a fully threedimensional model of an old Mexican city. The city itself motivates thi...
Jiri Zara, Bedrich Benes, Rocio Ruiz-Rodarte
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 3 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
ISCAPDCS
2003
15 years 1 months ago
Utilization of Separate Caches to Eliminate Cache Pollution Caused by Memory Management Functions
Data intensive service functions such as memory allocation/de-allocation, data prefetching, and data relocation can pollute processor cache in conventional systems since the same ...
Mehran Rezaei, Krishna M. Kavi
ICCV
2009
IEEE
16 years 4 months ago
Adaptive Fragments-Based Tracking of Non-Rigid Objects Using Level Sets
We present an approach to visual tracking based on dividing a target into multiple regions, or fragments. The target is represented by a Gaussian mixture model in a joint feature...
Prakash Chockalingam, Nalin Pradeep