Sciweavers

2956 search results - page 91 / 592
» Targeted Data Prefetching
Sort
View
133
Voted
VISUALIZATION
2003
IEEE
15 years 7 months ago
Planet-Sized Batched Dynamic Adaptive Meshes (P-BDAM)
We describe an efficient technique for out-of-core management and interactive rendering of planet sized textured terrain surfaces. The technique, called P-Batched Dynamic Adaptiv...
Paolo Cignoni, Fabio Ganovelli, Enrico Gobbetti, F...
SPAA
2003
ACM
15 years 7 months ago
Asynchronous parallel disk sorting
We develop an algorithm for parallel disk sorting, whose I/O cost approaches the lower bound and that guarantees almost perfect overlap between I/O and computation. Previous algor...
Roman Dementiev, Peter Sanders
135
Voted
IEEEPACT
2002
IEEE
15 years 7 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
HPCA
1999
IEEE
15 years 6 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
MICRO
1997
IEEE
128views Hardware» more  MICRO 1997»
15 years 6 months ago
Run-Time Spatial Locality Detection and Optimization
As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, lat...
Teresa L. Johnson, Matthew C. Merten, Wen-mei W. H...