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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
16 years 3 days ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Approximation Algorithm for Process Mapping on Network Processor Architectures
The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multiprocessing, ...
Christopher Ostler, Karam S. Chatha, Goran Konjevo...
BMCBI
2006
151views more  BMCBI 2006»
15 years 3 months ago
Machine learning and word sense disambiguation in the biomedical domain: design and evaluation issues
Background: Word sense disambiguation (WSD) is critical in the biomedical domain for improving the precision of natural language processing (NLP), text mining, and information ret...
Hua Xu, Marianthi Markatou, Rositsa Dimova, Hongfa...
SENSYS
2003
ACM
15 years 8 months ago
DFuse: a framework for distributed data fusion
Simple in-network data aggregation (or fusion) techniques for sensor networks have been the focus of several recent research efforts, but they are insufficient to support advance...
Rajnish Kumar, Matthew Wolenetz, Bikash Agarwalla,...
CPAIOR
2007
Springer
15 years 9 months ago
Cost-Bounded Binary Decision Diagrams for 0-1 Programming
Abstract. In recent work binary decision diagrams (BDDs) were introduced as a technique for postoptimality analysis for integer programming. In this paper we show that much smaller...
Tarik Hadzic, John N. Hooker