Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Alternating-time temporal logic (atl) is one of the most influential logics for reasoning about agents’ abilities. Constructive Strategic Logic (csl) is a variant of atl for im...
In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and (multiway decision graphs) model checker. Our ...
In this paper, we describe an approach to formally assess whether an organization conforms to a body of regulation. Conformance is cast as a model checking question where the regul...
Nikhil Dinesh, Aravind K. Joshi, Insup Lee, Oleg S...
The need of formal verification is a problem that involves all the fields in which sensible data are managed. In this context the verification of data streams became a fundamental...