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ITC
2003
IEEE
167views Hardware» more  ITC 2003»
15 years 6 months ago
Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
Rahul Kundu, R. D. (Shawn) Blanton
PTS
2007
106views Hardware» more  PTS 2007»
15 years 2 months ago
A New Method for Interoperability Test Generation
Interoperability testing aims at verifying the possibility for two or more components to communicate correctly while providing the foreseen services. In this paper, we describe a n...
Alexandra Desmoulin, César Viho
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
15 years 7 months ago
Effective TARO Pattern Generation
TARO test patterns are transition fault test patterns that sensitize each transition fault to all of the outputs that can be reached from the fault location. We were not able to i...
Intaik Park, Ahmad A. Al-Yamani, Edward J. McClusk...
SIGSOFT
2007
ACM
16 years 2 months ago
CTG: a connectivity trace generator for testing the performance of opportunistic mobile systems
The testing of the performance of opportunistic communication protocols and applications is usually done through simulation as i) deployments are expensive and should be left to t...
Roberta Calegari, Mirco Musolesi, Franco Raimondi,...
AICT
2008
IEEE
119views Communications» more  AICT 2008»
15 years 1 months ago
Simplification of Frequency Test for Random Number Generation Based on Chi-Square
This paper presents the simplified method of random test suite based on the frequency (block) test. The test is used to check the first property of random numbers which is to have ...
Kruawan Wongpanya, Keattisak Sripimanwat, Kanok Je...