72 search results - page 13 / 15 » Test register insertion with minimum hardware cost |
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
ASPDAC
2010
ACM
13 years 4 months ago
2010
ACM
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...
ICCAD
2004
IEEE
14 years 3 months ago
2004
IEEE
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
DATE
2005
IEEE
13 years 12 months ago
2005
IEEE
— State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated due to global source of variations and path r...
DATE
2010
IEEE
13 years 11 months ago
2010
IEEE
—Systems based on satellite localization are enabling new scenarios for road charging schemes by offering the possibility to charge drivers as a function of their road usage. An ...