624 search results - page 13 / 125 » Test set compaction algorithms for combinational circuits |
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
75
Voted
ISAAC
2007
Springer
15 years 3 months ago
2007
Springer
This paper shows that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit. We also show non-trivial lower bounds for the ...
68
Voted
DAC
2003
ACM
15 years 2 months ago
2003
ACM
This paper presents a compact Nonlinear model Order Reduction Method (NORM) that is applicable for time-invariant and time-varying weakly nonlinear systems. NORM is suitable for r...
65
Voted
CSR
2007
Springer
15 years 3 months ago
2007
Springer
We investigate the complexity of equivalence problems for {∪, ∩, − , +, ×}-circuits computing sets of natural numbers. These problems were first introduced by Stockmeyer an...
CORR
2010
Springer
14 years 9 months ago
2010
Springer
In this paper a new solution is proposed for testing simple stwo stage electronic circuits. It minimizes the number of tests to be performed to determine the genuinity of the circ...