624 search results - page 34 / 125 » Test set compaction algorithms for combinational circuits |
113
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ITC
2003
IEEE
15 years 9 months ago
2003
IEEE
A fault fj is said to dominate another fault fi if all tests for fi detect fj . When two faults dominate each other, they are called equivalent. Dominance and equivalence relation...
155
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ICALP
2010
Springer
15 years 8 months ago
2010
Springer
We say that a polynomial f(x1, . . . , xn) is indecomposable if it cannot be written as a product of two polynomials that are defined over disjoint sets of variables. The polynom...
142
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TC
1998
15 years 3 months ago
1998
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
153
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DFT
2004
IEEE
15 years 7 months ago
2004
IEEE
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
253
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FMCAD
1998
Springer
15 years 8 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...