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SIGMOD
2010
ACM
260views Database» more  SIGMOD 2010»
15 years 9 months ago
Towards proximity pattern mining in large graphs
Mining graph patterns in large networks is critical to a variety of applications such as malware detection and biological module discovery. However, frequent subgraphs are often i...
Arijit Khan, Xifeng Yan, Kun-Lung Wu
ICCAD
2007
IEEE
135views Hardware» more  ICCAD 2007»
16 years 1 months ago
A selective pattern-compression scheme for power and test-data reduction
— This paper proposes a selective pattern-compression scheme to minimize both test power and test data volume during scan-based testing. The proposed scheme will selectively supp...
Chia-Yi Lin, Hung-Ming Chen
ETS
2007
IEEE
91views Hardware» more  ETS 2007»
15 years 11 months ago
PPM Reduction on Embedded Memories in System on Chip
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
Said Hamdioui, Zaid Al-Ars, Javier Jiménez,...
ITC
2000
IEEE
104views Hardware» more  ITC 2000»
15 years 9 months ago
Application of deterministic logic BIST on industrial circuits
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...
Gundolf Kiefer, Hans-Joachim Wunderlich, Harald P....
ATS
2009
IEEE
111views Hardware» more  ATS 2009»
15 years 11 months ago
Dynamic Compaction in SAT-Based ATPG
SAT-based automatic test pattern generation has several advantages compared to conventional structural procedures, yet often yields too large test sets. We present a dynamic compa...
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudha...