535 search results - page 67 / 107 » The Cache Performance and Optimizations of Blocked Algorithm... |
105
Voted
ICMCS
2000
IEEE
15 years 6 months ago
2000
IEEE
A key enabling technology for the prolikration of multima dia PC’s is the availability of fast video codeca, which are the basic building blocks of many new multimedia applicati...
117
Voted
ICALP
2009
Springer
16 years 2 months ago
2009
Springer
We initiate the study of sublinear-time algorithms in the external memory model [14]. In this model, the data is stored in blocks of a certain size B, and the algorithm is charged...
112
Voted
CAINE
2006
15 years 3 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
159
click to vote
ECRTS
2007
IEEE
15 years 8 months ago
2007
IEEE
Many embedded systems feature processors coupled with a small and fast scratchpad memory. To the difference with caches, allocation of data to scratchpad memory must be handled by...
129
Voted
RTAS
2008
IEEE
15 years 8 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...