82 search results - page 15 / 17 » The Case for Analog Circuit Verification |
DAC
2002
ACM
14 years 7 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
ICCAD
2003
IEEE
13 years 11 months ago
2003
IEEE
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
MFCS
2000
Springer
13 years 10 months ago
2000
Springer
Abstract. We consider the iterates of bilinear functions over the semiring (max, +). Equivalently, our object of study can be viewed as recognizable tree series over the semiring (...
FPGA
2009
ACM
14 years 1 months ago
2009
ACM
Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s lo...
DAC
2000
ACM
14 years 7 months ago
2000
ACM
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...