148 search results - page 9 / 30 » The Challenges of Hardware Synthesis from C-Like Languages |
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
ASPDAC
2004
ACM
15 years 5 months ago
2004
ACM
Abstract— To meet the challenge of increasing design complexity, designers are turning to system level design languages to model systems at a higher level of abstraction. This pa...
211
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POPL
2007
ACM
16 years 20 days ago
2007
ACM
We propose a new technique for hardware synthesis from higherorder functional languages with imperative features based on Reynolds's Syntactic Control of Interference. The re...
99
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CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
102
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ATVA
2006
Springer
15 years 4 months ago
2006
Springer
In synthesis we construct finite state systems from temporal specifications. While this problem is well understood in the classical setting of non-probabilistic synthesis, this pap...