100 search results - page 2 / 20 » The Challenges of Synthesizing Hardware from C-Like Language... |
DATE
2008
IEEE
14 years 27 days ago
2008
IEEE
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
FDL
2005
IEEE
14 years 1 days ago
2005
IEEE
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
ICCAD
2004
IEEE
14 years 3 months ago
2004
IEEE
It is common wisdom that synthesizing hardware from higher-level descriptions than Verilog will incur a performance penalty. The case study here shows that this need not be the ca...
ICCAD
1996
IEEE
13 years 10 months ago
1996
IEEE
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
SPEECH
2010
13 years 1 months ago
2010
One of the main problems in developing a text-to-speech (TTS) synthesizer for French lies in grapheme-to-phoneme conversion. Automatic converters produce still too many errors in ...