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» The Design and Analysis of Parallel Algorithms
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113
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EUROPAR
2008
Springer
15 years 2 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
113
Voted
IJON
2007
83views more  IJON 2007»
15 years 19 days ago
Neurospaces: Towards automated model partitioning for parallel computers
Parallel computers have the computing power needed to simulate biologically accurate neuronal network models. Partitioning is the process of cutting a model in pieces and assignin...
Hugo Cornelis, Erik De Schutter
IPPS
2007
IEEE
15 years 7 months ago
ExPert: Dynamic Analysis Based Fault Location via Execution Perturbations
We are designing dynamic analysis techniques to identify executed program statements where a fault lies, i.e. the fault candidate set. To narrow the set of statements in the fault...
Neelam Gupta, Rajiv Gupta
88
Voted
P2P
2006
IEEE
15 years 6 months ago
Cost-Based Analysis of Hierarchical DHT Design
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
Stefan Zöls, Zoran Despotovic, Wolfgang Kelle...
109
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FMCAD
2006
Springer
15 years 4 months ago
Formal Analysis and Verification of an OFDM Modem Design using HOL
In this paper we formally specify and verify an implementation of the IEEE802.11a standard physical layer based OFDM (Orthogonal Frequency Division Multiplexing) modem using the HO...
Abu Nasser Mohammed Abdullah, Behzad Akbarpour, So...