5005 search results - page 933 / 1001 » The Design and Analysis of Parallel Algorithms |
143
Voted
INFOCOM
2012
IEEE
13 years 6 months ago
2012
IEEE
—Power optimization has become a key challenge in the design of large-scale enterprise data centers. Existing research efforts focus mainly on computer servers to lower their ene...
127
Voted
BMCBI
2010
15 years 3 months ago
2010
Background: Chromatin immunoprecipitation (ChIP) followed by high-throughput sequencing (ChIP-seq) or ChIP followed by genome tiling array analysis (ChIP-chip) have become standar...
126
Voted
DAC
2009
ACM
16 years 4 months ago
2009
ACM
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
163
Voted
KDD
2003
ACM
16 years 4 months ago
2003
ACM
Support vector machines (SVMs) have been promising methods for classification and regression analysis because of their solid mathematical foundations which convey several salient ...
155
Voted
CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...