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SIGCSE
2006
ACM
362views Education» more  SIGCSE 2006»
15 years 7 months ago
Chirp on crickets: teaching compilers using an embedded robot controller
Traditionally, the topics of compiler construction and language processing have been taught as an elective course in Computer Science curricula. As such, students may graduate wit...
Li Xu, Fred G. Martin
ICS
2005
Tsinghua U.
15 years 7 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
15 years 6 months ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu
SBCCI
2009
ACM
131views VLSI» more  SBCCI 2009»
15 years 6 months ago
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown
Because of the aggressive scaling of integrated circuits and the given limits of atomic scales, circuit designers have to become more and more aware of the arising reliability and...
Hagen Sämrow, Claas Cornelius, Frank Sill, An...
FPL
2009
Springer
117views Hardware» more  FPL 2009»
15 years 6 months ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
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