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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 11 days ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
HPDC
2012
IEEE
13 years 10 days ago
VNET/P: bridging the cloud and high performance computing through fast overlay networking
networking with a layer 2 abstraction provides a powerful model for virtualized wide-area distributed computing resources, including for high performance computing (HPC) on collec...
Lei Xia, Zheng Cui, John R. Lange, Yuan Tang, Pete...
SIGMOD
2009
ACM
130views Database» more  SIGMOD 2009»
15 years 10 months ago
FlashLogging: exploiting flash devices for synchronous logging performance
Synchronous transactional logging is the central mechanism for ensuring data persistency and recoverability in database systems. Unfortunately, magnetic disks are ill-suited for t...
Shimin Chen
SAC
2010
ACM
15 years 4 months ago
ReSSD: a software layer for resuscitating SSDs from poor small random write performance
NAND flash-based solid state drives have emerged as revolutionary storage media during recent years. However, the wide-spread of SSD technology is currently obstructed by the fac...
Youngjae Lee, Jin-Soo Kim, Seungryoul Maeng
ARCS
2009
Springer
15 years 4 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...