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ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 3 months ago
Instruction Cache Fetch Policies for Speculative Execution
Current trends in processor design are pointing to deeper and wider pipelines and superscalar architectures. The efficient use of these resources requires speculative execution, ...
Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grun...
ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
15 years 5 months ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar
IPPS
2007
IEEE
15 years 6 months ago
Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
Derek L. Schuff, Vijay S. Pai
TCSV
2002
107views more  TCSV 2002»
14 years 11 months ago
Design, performance analysis, and implementation of a super-scalar video-on-demand system
Despite the availability of video-on-demand (VoD) services in a number of cities around the world, large-scale deployment of VoD services in a metropolitan area is still economical...
Jack Y. B. Lee, C. H. Lee
CODES
2001
IEEE
15 years 3 months ago
A design framework to efficiently explore energy-delay tradeoffs
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
William Fornaciari, Donatella Sciuto, Cristina Sil...