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» The Design and Performance of a Conflict-Avoiding Cache
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ISCA
1994
IEEE
88views Hardware» more  ISCA 1994»
15 years 4 months ago
A Unified Architectural Tradeoff Methodology
Wepresentaunijiedapp?'each to assess thet7adeoff of architecture techniques that affect mean memory access time. The architectural features we consider inciude cache hit Tati...
Chung-Ho Chen, Arun K. Somani
IEEEPACT
2008
IEEE
15 years 6 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
16 years 6 days ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...

Publication
179views
16 years 10 months ago
Characteristics of Destination Address Locality in Computer Networks: A Comparison of Caching Schemes
The size of computer networks, along with their bandwidths, is growing exponentially. To support these large, high-speed networks, it is neccessary to be able to forward packets in...
R. Jain
VLDB
1997
ACM
104views Database» more  VLDB 1997»
15 years 4 months ago
Integrating Reliable Memory in Databases
Abstract. Recent results in the Rio project at the University of Michigan show that it is possible to create an area of main memory that is as safe as disk from operating system cr...
Wee Teck Ng, Peter M. Chen