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MICRO
1999
IEEE
109views Hardware» more  MICRO 1999»
15 years 9 months ago
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
Daniel A. Connors, Wen-mei W. Hwu
PVM
2007
Springer
15 years 11 months ago
Distributed Real-Time Computing with Harness
Abstract. Modern parallel and distributed computing solutions are often built onto a “middleware” software layer providing a higher and common level of service between computat...
Emanuele Di Saverio, Marco Cesati, Christian Di Bi...
SOFTWARE
2011
14 years 12 months ago
A Synergetic Approach to Throughput Computing on x86-Based Multicore Desktops
In the era of multicores, many applications that tend to require substantial compute power and data crunching (aka Throughput Computing Applications) can now be run on desktop PCs...
Chi-Keung Luk, Ryan Newton, William Hasenplaugh, M...
DATE
2009
IEEE
85views Hardware» more  DATE 2009»
15 years 11 months ago
SCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
Abelardo Jara-Berrocal, Ann Gordon-Ross
IPPS
2007
IEEE
15 years 11 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...