2155 search results - page 298 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
130
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EUROPAR
2010
Springer
15 years 7 months ago
2010
Springer
Mutual exclusion locks limit concurrency but offer low latency. Software transactional memory (STM) typically has higher latency, but scales well. In this paper we propose transac...
148
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HPCA
2005
IEEE
16 years 6 months ago
2005
IEEE
In this paper, we propose a new congestion management strategy for lossless multistage interconnection networks that scales as network size and/or link bandwidth increase. Instead...
146
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HPCA
2003
IEEE
16 years 6 months ago
2003
IEEE
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
308
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ASPLOS
2009
ACM
16 years 6 months ago
2009
ACM
QR decomposition is a computationally intensive linear algebra operation that factors a matrix A into the product of a unitary matrix Q and upper triangular matrix R. Adaptive sys...
193
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SPAA
1995
ACM
15 years 9 months ago
1995
ACM
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...