Sciweavers

2155 search results - page 62 / 431
» The EM-X Parallel Computer: Architecture and Basic Performan...
Sort
View
DSD
2009
IEEE
147views Hardware» more  DSD 2009»
15 years 8 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
HPCA
2007
IEEE
16 years 4 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
139
Voted
IEEEPACT
2009
IEEE
15 years 11 months ago
Architecture Support for Improving Bulk Memory Copying and Initialization Performance
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar I...
EUROPAR
2001
Springer
15 years 9 months ago
Performance of High-Accuracy PDE Solvers on a Self-Optimizing NUMA Architecture
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
Sverker Holmgren, Dan Wallin
GCC
2005
Springer
15 years 10 months ago
The Architecture of SIG Computing Environment and Its Application to Image Processing
Spatial Information Grid (SIG) is a project of applying grid technology to share and integrate spatial data resources, information processing resources, equipment resources, and kn...
Chunhui Yang, Deke Guo, Yan Ren, Xueshan Luo, Jinf...