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149
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IPPS
2007
IEEE
15 years 10 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
211
Voted
CBMS
2009
IEEE
15 years 11 months ago
Lessons learned in developing a low-cost high performance medical imaging cluster
This paper explores the usefulness of the Sony PlayStation 3 R (PS3) for medical image processing. Medical image processing often entails dealing with a large number of high resol...
Kirt D. Lillywhite, Dah-Jye Lee, Sameer Antani, Do...
109
Voted
IPPS
2006
IEEE
15 years 10 months ago
Investigation into programmability for layer 2 protocol frame delineation architectures
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...
Ciaran Toal, Sakir Sezer
IPPS
2005
IEEE
15 years 10 months ago
Embedded MPLS Architecture
This paper presents a hardware architecture for Multi Protocol Label Switching (MPLS). MPLS is a protocol used primarily to prioritize internet traffic and improve bandwidth utili...
Raymond Peterkin, Dan Ionescu
HPCA
2006
IEEE
16 years 4 months ago
Phase characterization for power: evaluating control-flow-based and event-counter-based techniques
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...
Canturk Isci, Margaret Martonosi