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DAC
2006
ACM
15 years 10 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
CHI
2006
ACM
15 years 10 months ago
Generating automated predictions of behavior strategically adapted to specific performance objectives
It has been well established in Cognitive Psychology that humans are able to strategically adapt performance, even highly skilled performance, to meet explicit task goals such as ...
Katherine Eng, Richard L. Lewis, Irene Tollinger, ...
ESOP
2010
Springer
15 years 7 months ago
Generative Operational Semantics for Relaxed Memory Models
The specification of the Java Memory Model (JMM) is phrased in terms of acceptors of execution sequences rather than the standard generative view of operational semantics. This cre...
Radha Jagadeesan, Corin Pitcher and James Riely
SC
2009
ACM
15 years 4 months ago
Automating the generation of composed linear algebra kernels
Memory bandwidth limits the performance of important kernels in many scientific applications. Such applications often use sequences of Basic Linear Algebra Subprograms (BLAS), an...
Geoffrey Belter, Elizabeth R. Jessup, Ian Karlin, ...
EUROGP
2001
Springer
124views Optimization» more  EUROGP 2001»
15 years 2 months ago
An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
Massimiliano Erba, Roberto Rossi, Valentino Libera...