REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
In many design tasks it is difficult to explicitly define an objective function. This paper uses machine learning to derive an objective in a feature space based on selected examp...