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MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
15 years 10 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
INFOCOM
2003
IEEE
15 years 9 months ago
On Guaranteed Smooth Scheduling For Input-Queued Switches
— Input-queued switches are used extensively in the design of high-speed routers. As switch speeds and sizes increase, the design of the switch scheduler becomes a primary challe...
Isaac Keslassy, Murali S. Kodialam, T. V. Lakshman...
CGO
2004
IEEE
15 years 7 months ago
VHC: Quickly Building an Optimizer for Complex Embedded Architectures
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
Michael Dupré, Nathalie Drach, Olivier Tema...
INFOCOM
2009
IEEE
15 years 10 months ago
Multi-VPN Optimization for Scalable Routing via Relaying
—Enterprise networks are increasingly adopting Layer 3 Multiprotocol Label Switching (MPLS) Virtual Private Network (VPN) technology to connect geographically disparate locations...
MohammadHossein Bateni, Alexandre Gerber, Mohammad...
INFOCOM
2008
IEEE
15 years 10 months ago
Multihop Local Pooling for Distributed Throughput Maximization in Wireless Networks
Abstract—Efficient operation of wireless networks requires distributed routing and scheduling algorithms that take into account interference constraints. Recently, a few algorit...
Gil Zussman, Andrew Brzezinski, Eytan Modiano