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ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 1 months ago
Algorithms for simultaneous consideration of multiple physical synthesis transforms for timing closure
We propose a post-placement physical synthesis algorithm that can apply multiple circuit synthesis and placement transforms on a placed circuit to improve the critical path delay ...
Huan Ren, Shantanu Dutt
ICCAD
2003
IEEE
221views Hardware» more  ICCAD 2003»
16 years 1 months ago
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
Le Yan, Jiong Luo, Niraj K. Jha
SARA
2009
Springer
15 years 10 months ago
Efficient SAT Techniques for Absolute Encoding of Permutation Problems: Application to Hamiltonian Cycles
We study novel approaches for solving of hard combinatorial problems by translation to Boolean Satisfiability (SAT). Our focus is on combinatorial problems that can be represented...
Miroslav N. Velev, Ping Gao 0002
ICC
2008
IEEE
175views Communications» more  ICC 2008»
15 years 10 months ago
Routing in Cooperative Wireless Networks with Mutual-Information Accumulation
Cooperation between the nodes of wireless multihop networks can increase communication reliability, reduce energy consumption, and decrease latency. The possible improvements are ...
Stark C. Draper, Lingjia Liu, Andreas F. Molisch, ...
CODES
2007
IEEE
15 years 10 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...