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ISCAS
2005
IEEE
97views Hardware» more  ISCAS 2005»
15 years 9 months ago
Two-level decoupled Hamming network for associative memory under noisy environment
— Compared with a single level Hamming associative memory, a simple model based on uniform random noise analysis has proved a twolevel decoupled Hamming network to be an efficie...
Liang Chen, Naoyuki Tokuda, Akira Nagai
135
Voted
ISPASS
2005
IEEE
15 years 9 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
129
Voted
HPCC
2005
Springer
15 years 8 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
154
Voted
ASIASIM
2004
Springer
15 years 8 months ago
LSTAFF: System Software for Large Block Flash Memory
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption...
Tae-Sun Chung, Dong-Joo Park, Yeonseung Ryu, Sugwo...
WCE
2007
15 years 4 months ago
Modified Memory Convergence with Fuzzy PSO
—Associative neural memories are models of biological phenomena that allow for the storage of pattern associations and the retrieval of the desired output pattern upon presentati...
Subhash Chandra Pandey, P. K. Mishra