456 search results - page 72 / 92 » The Logical Execution Time Paradigm |
106
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DFT
2006
IEEE
15 years 7 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
148
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CORR
2009
Springer
14 years 11 months ago
2009
Springer
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
112
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DASFAA
2003
IEEE
15 years 6 months ago
2003
IEEE
To integrate many data sources we use a peer mediator framework where views defined in the peers are logically composed in terms of each other. A common approach to execute queri...
132
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SIGSOFT
2007
ACM
16 years 2 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
195
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ICDT
2009
ACM
16 years 2 months ago
2009
ACM
Almost all medium- and large-scale businesses rely on electronic workflow systems to manage their business processes. A key challenge is to enable the easy re-use and modification...