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    ISCAS
    1995
    IEEE
    81views Hardware» more  ISCAS 1995»
    Minimizing Power Dissipation in Non-Zero Skew-Based Clock Distribution Networks
    15 years 1 months ago
    Minimizing Power Dissipation in Non-Zero Skew-Based Clock Distribution Networks
    Download  www.ece.rochester.edu
    José Luis Neves, Eby G. Friedman
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    ISLPED
    2007
    ACM
    142views Hardware» more  ISLPED 2007»
    Clocking structures and power analysis for nanomagnet-based logic devices
    14 years 11 months ago
    Clocking structures and power analysis for nanomagnet-based logic devices
    Download  www.nd.edu
    Michael T. Niemier, M. Alam, Xiaobo Sharon Hu, Gar...
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    IEICET
    2008
    78views more  IEICET 2008»
    Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
    14 years 9 months ago
    Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
    Download  www28.cs.kobe-u.ac.jp
    Takashi Takeuchi, Yu Otake, Masumi Ichien, Akihiro...
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    TRETS
    2008
    42views more  TRETS 2008»
    On the trade-off between power and flexibility of FPGA clock networks
    14 years 9 months ago
    On the trade-off between power and flexibility of FPGA clock networks
    Download  www.ece.ubc.ca
    Julien Lamoureux, Steven J. E. Wilton
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    ASPDAC
    2010
    ACM
    107views Hardware» more  ASPDAC 2010»
    Buffered clock tree sizing for skew minimization under power and thermal budgets
    14 years 7 months ago
    Buffered clock tree sizing for skew minimization under power and thermal budgets
    Download  www.asp-dac.itri.org.tw
    Krit Athikulwongse, Xin Zhao, Sung Kyu Lim
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