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» The Observational Power of Clocks
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MICRO
2002
IEEE
108views Hardware» more  MICRO 2002»
15 years 2 months ago
Dynamic frequency and voltage control for a multiple clock domain microarchitecture
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
Greg Semeraro, David H. Albonesi, Steve Dropsho, G...
IPSN
2004
Springer
15 years 3 months ago
Adaptive clock synchronization in sensor networks
Recent advances in technology have made low cost, low power wireless sensors a reality. Clock synchronization is an important service in any distributed system, including sensor n...
Santashil PalChaudhuri, Amit Kumar Saha, David B. ...
DAC
1996
ACM
15 years 1 months ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
BIOSYSTEMS
2008
100views more  BIOSYSTEMS 2008»
14 years 9 months ago
Objective patterns in the evolving network of non-equivalent observers
The world's objective pattern is formed through consistent histories of quantum measurements originating as different branches of the same wave function. When we come close t...
Abir U. Igamberdiev
GLVLSI
2000
IEEE
75views VLSI» more  GLVLSI 2000»
15 years 2 months ago
A wave-pipelined router architecture using ternary associative memory
In this paper a wave-pipelining scheme is used to increase the performance of a router architecture. Wave-pipelining has a potential of significantly reducing clock cycle time an...
José G. Delgado-Frias, Jabulani Nyathi, Lax...