1542 search results - page 35 / 309 » The Observational Power of Clocks |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
In the past, processor design trends were dominated by increasingly complex feature sets, higher clock speeds, growing thermal envelopes and increasing power dissipation. Recently...
56
Voted
ISLPED
1996
ACM
15 years 1 months ago
1996
ACM
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
119
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MOBISYS
2011
ACM
14 years 16 days ago
2011
ACM
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
49
Voted
ISCAS
1999
IEEE
15 years 2 months ago
1999
IEEE
A class of clocked/autonomous circuits is defined in which the behaviour is described by a one-dimensional mapping. For these circuits, the power densityspectrum at the harmonics ...