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» The Observational Power of Clocks
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ICCD
2008
IEEE
194views Hardware» more  ICCD 2008»
15 years 6 months ago
Understanding performance, power and energy behavior in asymmetric multiprocessors
Abstract—Multiprocessor architectures are becoming popular in both desktop and mobile processors. Among multiprocessor architectures, asymmetric architectures show promise in sav...
Nagesh B. Lakshminarayana, Hyesoon Kim
APCCAS
2006
IEEE
206views Hardware» more  APCCAS 2006»
15 years 3 months ago
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory
—A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bi...
Po-Tsang Huang, Wei-Keng Chang, Wei Hwang
ICCD
2000
IEEE
137views Hardware» more  ICCD 2000»
15 years 2 months ago
Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
Alexandre Solomatnikov, Kaushik Roy, Cheng-Kok Koh...
FPL
1995
Springer
106views Hardware» more  FPL 1995»
15 years 1 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
CSSE
2008
IEEE
14 years 11 months ago
A Power-Efficient Floating-Point Co-processor Design
According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor core...
Xunying Zhang, Xubang Shen