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ICCD
2007
IEEE
183views Hardware» more  ICCD 2007»
16 years 1 months ago
Constraint satisfaction in incremental placement with application to performance optimization under power constraints
We present new techniques for explicit constraint satisfaction in the incremental placement process. Our algorithm employs a Lagrangian Relaxation (LR) type approach in the analyt...
Huan Ren, Shantanu Dutt
ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
15 years 10 months ago
Analysis of power consumption in VLSI global interconnects
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
Youngsoo Shin, Hyung-Ock Kim
TWC
2008
124views more  TWC 2008»
15 years 4 months ago
Reverse Link Performance of a DS-CDMA System With Both Fast and Slow Power Controlled Users
In this paper the performance of the reverse link of a multicell DS-CDMA system with coexisting open-loop and closed-loop power controlled users transmitting heterogeneous traffic ...
Loren Carrasco, Guillem Femenias
ICCD
2007
IEEE
99views Hardware» more  ICCD 2007»
15 years 8 months ago
Power reduction of chip multi-processors using shared resource control cooperating with DVFS
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
Ryo Watanabe, Masaaki Kondo, Hiroshi Nakamura, Tak...
ASAP
2005
IEEE
104views Hardware» more  ASAP 2005»
15 years 10 months ago
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, ...