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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
15 years 1 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
CASES
2004
ACM
15 years 1 months ago
Providing time- and space- efficient procedure calls for asynchronous software thread integration
Asynchronous Software Thread Integration (ASTI) provides fine-grain concurrency in real-time threads by statically scheduling (integrating) code from primary threads into secondar...
Vasanth Asokan, Alexander G. Dean
ALT
1995
Springer
15 years 1 months ago
Learning Unions of Tree Patterns Using Queries
This paper characterizes the polynomial time learnability of TPk, the class of collections of at most k rst-order terms. A collection in TPk de nes the union of the languages de n...
Hiroki Arimura, Hiroki Ishizaka, Takeshi Shinohara
WCRE
1995
IEEE
15 years 1 months ago
Pattern Matching for Design Concept Localization
A legacy system is an operational, large-scale software system that is maintained beyond its first generation of programmers. It typically represents a massive economic investmen...
Kostas Kontogiannis, Renato de Mori, Morris Bernst...
CGO
2008
IEEE
14 years 11 months ago
Comprehensive path-sensitive data-flow analysis
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
Aditya V. Thakur, R. Govindarajan
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