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» The Simulation and Design of Integrated Inductors
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WSC
2004
14 years 11 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
DAC
2003
ACM
15 years 11 months ago
Multilevel global placement with retiming
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
Jason Cong, Xin Yuan
SLIP
2009
ACM
15 years 4 months ago
Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
Dae Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 2 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
ICRA
2008
IEEE
136views Robotics» more  ICRA 2008»
15 years 4 months ago
Toward a multi-disciplinary model for bio-robotic systems
Abstract— The design of robotic systems involves contributions from several areas of science and engineering. Electrical, mechanical and software components must be integrated to...
Richard Primerano, David Wilkie, William Regli