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MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 8 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
ICC
2007
IEEE
137views Communications» more  ICC 2007»
15 years 8 months ago
A Novel Algorithm and Architecture for High Speed Pattern Matching in Resource-Limited Silicon Solution
— Network Intrusion Detection Systems (NIDS) are more and more important for identifying and preventing the malicious attacks over the network. This paper proposes a novel cost-e...
Nen-Fu Huang, Yen-Ming Chu, Chi-Hung Tsai, Chen-Yi...
130
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IPPS
2007
IEEE
15 years 8 months ago
A Portable Framework for High-Speed Parallel Producer/Consumers on Real CMP, SMT and SMP Architectures
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
Richard T. Saunders, Clinton L. Jeffery, Derek T. ...
ESA
2003
Springer
111views Algorithms» more  ESA 2003»
15 years 7 months ago
Fast Smallest-Enclosing-Ball Computation in High Dimensions
Abstract. We develop a simple combinatorial algorithm for computing the smallest enclosing ball of a set of points in high dimensional Euclidean space. The resulting code is in mos...
Kaspar Fischer, Bernd Gärtner, Martin Kutz
BMCBI
2011
14 years 5 months ago
Detection of recurrent rearrangement breakpoints from copy number data
Background: Copy number variants (CNVs), including deletions, amplifications, and other rearrangements, are common in human and cancer genomes. Copy number data from array compara...
Anna M. Ritz, Pamela L. Paris, Michael Ittmann, Co...